| 摘要 |
PURPOSE:To output a signal of a prescribed voltage level and to vary a delay time freely by applying a normal power voltage to a first stage inverter and a final stage inverter, and applying a variable voltage to plural interval inverters. CONSTITUTION:Normal power voltages VDD and VSS are applied as they are to a 1st stage inverter IF, a final stage inverter IL and a waveform shaping inverter IS and power voltages VD1 and VS1 subject to variable control are fed to internal inverters IM. The normal power voltages VDD and VSS are applied to the final stage inverter IL, then a constant level of output signal is extracted independently of the power voltages VD1 and VS1 subject to variable control. On the other hand, the power voltages VDD and VSS are applied to internal inverters IM1-IMN via transmission gates T1, T2 and the delay time in the internal inverter IM is controlled by the voltages VD1 and VS1. |
