| 摘要 |
<p>PURPOSE:To miniaturize the constitution of a clock generating circuit by controlling a clock gate which supplies the input of an oscillation circuit to a CPU with the use of the output of an FF which uses the output of a comparator and the oscillation stop signal of the CPU as the set input and the reset input respectively. CONSTITUTION:When an oscillation stop signal is received by an oscillation circuit 1 from a CPU 4, the oscillation of the circuit 1 is stopped and the FF 5 and 6 are reset. When an oscillation starting signal is supplied from outside, the FF 7 is set and a reference voltage generating circuit 6 inputs the reference voltage to a comparator 2. Simultaneously, the CPU 4 outputs a signal to oscillate the circuit 1. A ceramic or a crystal oscillator increases gradually its soscillation amplitude when the oscillation is started. When the maximum amplitude of oscillation is larger than that of the circuit 6, the comparator 2 outputs a signal to set the FF 5. Thus a buffer 3 is turned on to start the supply of clock to the CPU 4. Consequently, a programming operating is facilitated.</p> |
