| 摘要 |
The circuit includes a decoding circuit (15) for decoding address signal (A2-A7) for generating 3-bit chip enable signal supplied to state register (16), channel selection register (17) and parallel I/O circuit (19), a state register (16) for checking BUSY signal for designating printer state and strobe signal (STB) for controlling data transmission to printer, a channel selection register (17) for transmitting channel selection signal (SELoSEL2) by receiving output signal of state register and data through data bus (D0-D1), and a parallel I/O circuit (19) having control ports (PC0-PC7) for controlling output ports (PB0-PB7), STB and BUSY signal.
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