Circuit arrangement for reducing the stimulus resistance of telephone sets

摘要

A circuit arrangement for reducing the stimulus resistance of telephone sets is indicated which has a stimulus arm in parallel with circuit components of the telephone set carrying loop current. To ensure that the stimulus response is adequately low during the stimulus interval, but is adequately high during a speech connection even in spite of variances in the characteristic data of the components, at least three self-conducting field-effect transistors are provided in series in the stimulus arm, where the middle field-effect transistor is of the opposite conductance type to the two outer field-effect transistors. The gate of the middle field-effect transistor taps a control voltage which is dependent on the loop current irrespective of the polarity, and the gate of the two outer field-effect transistors taps at least the drain source voltage of the middle field-effect transistor from the stimulus arm as a control voltage.