| 发明名称 |
|
| 摘要 |
PURPOSE:To obtain a multifunctional and highly integrated logical circuit of good performance by drawing separately the output from each of the given number of Schottky junction electrodes formed in the drain zone of MISFET. |
| 申请公布号 |
JPS5940293(B2) |
申请公布日期 |
1984.09.29 |
| 申请号 |
JP19760054736 |
申请日期 |
1976.05.12 |
| 申请人 |
FUJITSU LTD |
发明人 |
NISHIUCHI KOICHI;SHINODA MASAICHI |
| 分类号 |
H01L21/822;H01L21/8234;H01L21/8249;H01L27/04;H01L27/06;H01L27/07;H01L27/088;H01L29/78;H03K19/08 |
主分类号 |
H01L21/822 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
|
| 地址 |
|
