发明名称 DIVIDING DEVICE
摘要 PURPOSE:To output a correct quotient to two numbers of two's complement display by executing a division even if an absolute value of a dividend is larger than an absolute value of a divisor, and also using a non-recovery type dividing method. CONSTITUTION:A divisor of 16 bits and a dividend of 32 bits are stored in a register 6a and a register 6b, respectively. The dividend is shifted by using a bit position detecting circuit 9, a shifter controlling circuit 15 and a level shifter 14 until exclusive OR of the 31st bit and 30th bit being a sine bit of the dividend becomes ''0'', namely, until an absolute value becomes under 0.5. The corrected dividend is stored in the register 6b. Subsequently, the divisor is shifted until exclusive OR of the 31st bit and the 30th bit being a sine bit becomes ''1'', namely, until the absolute value becomes 0.5-1.0, and its result is stored in the register 6a. Said shift number is stored in a register 8, and can carry out a part of an exponent of the quotient.
申请公布号 JPS59160235(A) 申请公布日期 1984.09.10
申请号 JP19830035395 申请日期 1983.03.03
申请人 MATSUSHITA DENKI SANGYO KK 发明人 KUROSAKI NATSUME
分类号 G06F7/537;G06F7/507;G06F7/52;G06F7/535 主分类号 G06F7/537
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