发明名称 CONTROLLING CIRCUIT OF TIME INTERVAL OF DATA OUTPUT
摘要 PURPOSE:To reduce the size of an input data storing circuit necessary for a processing module and a data storing circuit for data driving or to rekove these circuits by regulating the data transfer time intervals of the same variable. CONSTITUTION:Data are inputted to a data memory part 10 and an input status signal is sent to an output interval controlling part 20. Data indicating time are applied from a timer part 30 to the control part 20. The control part 20 forms an address in accordance with the variable name of the data, outputs the address information and monitors the output time interval in every variable name. If an output condition is satisfied, the control part 20 outputs a signal indicating the existence of the variable name and output data and the address of the input data. Consequently, the data read out from the memory 10 are outputted to a data line 51 together with the variable name. Thus, the size of the input data storing circuit or the like can be reduced or removed by regulating the data transfer time interval.
申请公布号 JPS59128646(A) 申请公布日期 1984.07.24
申请号 JP19830003097 申请日期 1983.01.12
申请人 NIPPON DENKI KK 发明人 TENMA TSUTOMU
分类号 G06F15/82;G06F9/44;(IPC1-7):06F9/44 主分类号 G06F15/82
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