发明名称 LSI TESTING APPARATUS
摘要 PURPOSE:To obtain a LSI testing apparatus made simple in test preparation and capable of attaining to shorten a testing time and to enhance test efficiency, by writing test pattern data in the block region of memory which selects a write signal and independently controlled. CONSTITUTION:When change-over circuits 32-34 are controlled to select a water-enable signal W1, the block regions 21-24 of memory 20 corresponding to the number of pins, for example 60 pins of one head are independently controlled and test patterns of 240 pins in total are written in the memory 20. On the other hand, when a write-enable signal W2 is selected through the circuits 32, 34 and the signal W1 due to the circuit 33 is selected, test patterns of 120 pins are written in blocks 21 and 23, 22 and 24. Similarily, test patterns of 60 pins can be written in each of blocks 21-24. By this constitution, an LSI apparatus simple in test preparation and capable of attaining to shorten a testing time and to enhance test efficiency is obtained.
申请公布号 JPS59105569(A) 申请公布日期 1984.06.18
申请号 JP19820215012 申请日期 1982.12.08
申请人 TOSHIBA KK 发明人 IZAWA KIYOSATO
分类号 G01R31/28;G01R31/319 主分类号 G01R31/28
代理机构 代理人
主权项
地址