发明名称 INPUT AND OUTPUT CONTROL SYSTEM
摘要 PURPOSE:To improve processing performance and to reduce cost by transferring the contents of registers stored with instructions and data to a memory under DMA control, and permitting a microprocessor to retrieve the contents of the memory at a higher speed than that of input and output operation. CONSTITUTION:With regard to input and output instructions and data from a processor 1, a decoding circuit 14 confirms that they are for an input and output control mechanism 6, and an instruction transfer discriminating circuit 15 judges that the input and output instructions are to be transferred, so that they are stored in an instruction register 9 and a data register 10 respectively. Once signals from the circuits 14 and 15 are received by a DMA control circuit 16, a DMA request is sent to a microprocessor muPC8. The muPC8 informs the circuit 16 of DMA acceptance during the idle state of a microprogram being executed. The circuit 16 writes the contents of the registers 9 and 10 in a prescribed area of the memory 11. A timer 19 interrupts the muPC8 at constant intervals of time faster than the operation of an input and output equipment 12, and the muPC8 retrieves the contents of the storage area of the memory 11 to detect the instructions and data, thereby controlling the equipment 12.
申请公布号 JPS57143629(A) 申请公布日期 1982.09.04
申请号 JP19810028808 申请日期 1981.02.28
申请人 HITACHI SEISAKUSHO KK 发明人 MIYAJIMA SEITAROU;OGASAWARA TOSHIHARU
分类号 G06F13/12 主分类号 G06F13/12
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