发明名称 |
Self-limiting erasable memory cell with triple level polysilicon |
摘要 |
A non-volatile semiconductor memory device of the electrically erasable type employs a floating gate which is programmed by application to high voltage across the source and drain so that hot electrons traverse the gate oxide. The floating gate is discharged by electron tunneling through an erase window which is separated from the control gate. Very small cell size is provided by a triple level polysilicon structure.
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申请公布号 |
US4302766(A) |
申请公布日期 |
1981.11.24 |
申请号 |
US19790001097 |
申请日期 |
1979.01.05 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
GUTERMAN, DANIEL C.;CHIU, TE-LONG |
分类号 |
G11C16/04;H01L29/788;(IPC1-7):H01L27/02;B01J17/00 |
主分类号 |
G11C16/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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