发明名称 FAULT PROCESSING SYSTEM
摘要 PURPOSE:To limit the effect of the fault for the multi-processor control exchange system by giving the fault processing through one of the central processors in case some fault occurs at the network control processor and performing the exchange process with other processors. CONSTITUTION:For instance, if some fault occurs at processor 2-1, the fault is informed to fault processor 3-0. And processor 3-0 sets up the blocking flag concerning processor 2-1 on the blocking flag holding register 14 at interface part 4. Thus the access to processor 2-1 is inhibited when the occupancy process is given for bus 6 in view of securing an access to processor 2-1 while the general exchange action is performed by central processor 3-j, 3-k and others. And the relation call process to processor 2-1 is held by queuing matrix buffer 15-j and others.
申请公布号 JPS5537061(A) 申请公布日期 1980.03.14
申请号 JP19780110315 申请日期 1978.09.08
申请人 FUJITSU LTD;NIPPON TELEGRAPH & TELEPHONE;OKI ELECTRIC IND CO LTD;NIPPON ELECTRIC CO;HITACHI LTD 发明人 ENDOU KAZUMI;KAWASAKI TAKESHI;OSANAI YOSHIHIRO;OOYA TSUTOMU;TOKITA YOSHIAKI
分类号 H04M3/22;G06F15/16;H04M3/08;H04M3/24;H04Q3/545 主分类号 H04M3/22
代理机构 代理人
主权项
地址