发明名称 |
Accuracy of timing analysis using region-based voltage drop budgets |
摘要 |
A method and apparatus for improving the timing accuracy of an integrated circuit through region-based voltage drop budgets is provided. Further, a method for performing timing analysis on an integrated circuit partitioned into voltage drop regions is provided. During the timing analysis, a set of logic paths segments in each voltage drop region is tested to ensure that the integrated circuit meets a set of predefined timing requirements. Logic path segments that reside in different voltage drop regions are tested using a supply voltage inputted by the respective voltage drop region.
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申请公布号 |
US6971079(B2) |
申请公布日期 |
2005.11.29 |
申请号 |
US20020245972 |
申请日期 |
2002.09.18 |
申请人 |
SUN MICROSYSTEMS, INC. |
发明人 |
YEE GIN;TRIVEDI PRADEEP;BOBBA SUDHAKAR |
分类号 |
G06F17/50;(IPC1-7):G06F17/50;G06F9/45 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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