发明名称 Integrated circuit comprising a test mode secured by initialization of the test mode
摘要 An electronic circuit, having a test mode in application of the "internal scan path" technique, includes a plurality of configurable cells and a control circuit. The electronic circuit is adapted to working in a standard mode of operation or in a test mode during which the control circuit is active and configures the configurable cells either in a functional state or in a chained state. The electronic circuit furthermore includes a validation circuit that performs the following operations successively when it receives an instruction for changing the mode of operation (TEST, FIN) of the electronic circuit: produce initialization signals (INIT 1 , INIT 2 , . . . , INITN) to command the initialization of all the configurable cells, and then produce a mode-changing signal (VAL).
申请公布号 US2005172185(A1) 申请公布日期 2005.08.04
申请号 US20050046381 申请日期 2005.01.28
申请人 STMICROELECTRONICS S.A. 发明人 BANCEL FREDERIC;HELY DAVID
分类号 G01R31/317;G01R31/3185;G06F12/14;G06F21/00;G06F21/75;(IPC1-7):G06F7/38;H03K19/177;H03K19/173;G01R31/28 主分类号 G01R31/317
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