Handling interrupts in a multi-processor system

摘要

A data processing apparatus has a plurality of processors and a plurality of interrupt interfaces each for handling interrupt requests from a corresponding processor. An interrupt distributor controls routing of interrupt requests to the interrupt interfaces. A shared interrupt request is serviceable by multiple processors. In response to the shared interrupt request, a target interrupt interface issues an interrupt ownership request to the interrupt distributor, without passing the shared interrupt request to the corresponding processor, if it estimates that the corresponding processor is available for servicing the shared interrupt request. The shared interrupt request is passed to the corresponding processor when an ownership confirmation is received from the interrupt distributor indicating that the processor has been selected for servicing the shared interrupt request.

主权项

1. A data processing apparatus comprising:
a plurality of processors; a plurality of interrupt interfaces each configured to handle interrupt requests for a corresponding processor; and an interrupt distributor configured to control routing of the interrupt requests to the plurality of interrupt interfaces for the corresponding processors, the interrupt requests including a shared interrupt request which is serviceable by multiple processors; wherein in response to the shared interrupt request, a target interrupt interface corresponding to one of the multiple processors is configured to issue an interrupt ownership request to the interrupt distributor, without passing the shared interrupt request to the corresponding processor, if the target interrupt interface estimates that the corresponding processor is available for servicing the shared interrupt request, wherein the target interrupt interface is one of the plurality of interrupt interfaces; and the target interrupt interface is configured to pass the shared interrupt request to the corresponding processor in response to an ownership confirmation from the interrupt distributor indicating that the corresponding processor has been selected for servicing the shared interrupt request, wherein when the corresponding processor determines that the shared interrupt request cannot be serviced, the target interrupt interface is configured to provide an ownership release indication to the interrupt distributor indicating that the corresponding processor cannot service the shared interrupt request.