Digital technique for excess loop delay compensation in a continuous-time delta sigma modulator

摘要

A continuous time delta sigma modulator includes a quantizer, a buffer module, and a reference module. The quantizer includes a comparator that updates a digital output each cycle of a clock signal based on a comparison of a reference potential with an input generated based on a sample of an analog signal. The buffer module receives the digital output, stores the digital output for a predetermined delay period, and outputs the digital output after the predetermined delay period as a delayed digital output. The predetermined delay period is less than one cycle of the clock signal. The reference module selectively varies the reference potential based on the delayed digital output.

主权项

1. A continuous time delta sigma modulator, comprising:
a quantizer including a comparator that updates a digital output each cycle of a clock signal based on a comparison of a reference potential with an input generated based on a sample of an analog signal; a buffer module that receives the digital output, that stores the digital output for a predetermined delay period, and that outputs the digital output after the predetermined delay period as a delayed digital output, wherein the predetermined delay period is less than one cycle of the clock signal; and a reference module that selectively varies the reference potential based on the delayed digital output.