发明名称 |
One time programming memory cell, array structure and operating method thereof |
摘要 |
A one time programming memory cell includes a transistor (T), a first varactor (Va), and a second varactor (Va'). The transistor has a gate terminal, a source terminal and a drain terminal. The gate terminal of the transistor is connected with a word line (WL). The source terminal of the transistor is connected with a bit line (BL). A first end of the first varactor is connected with the drain terminal of the transistor. A second end of the first varactor is connected with a first program line (PL1). A first end of the second varactor is connected with the drain terminal of the transistor. A second end of the second varactor is connected with a second program line (PL2). |
申请公布号 |
EP2966685(A1) |
申请公布日期 |
2016.01.13 |
申请号 |
EP20140196974 |
申请日期 |
2014.12.09 |
申请人 |
EMEMORY TECHNOLOGY INC. |
发明人 |
WU, MENG-YI;CHEN, HSIN-MING |
分类号 |
H01L27/115;G11C17/16;G11C17/18;H01L23/525;H01L27/112 |
主分类号 |
H01L27/115 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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