发明名称 Display device and driving method thereof
摘要 To provide a display device and a driving method thereof, where variations in the threshold voltage of transistors can be compensated and thus variations in luminance of light-emitting elements can be suppressed. In a first period, initialization is performed; in a second period, a voltage based on the threshold voltage of a first transistor is held in first and second storage capacitors; in a third period, a voltage based on a video signal voltage and the threshold voltage of the first transistor is held in the first and second storage capacitors; and in a fourth period, voltages held in the first and second storage capacitors are applied to a gate terminal of the first transistor to supply a current to a light-emitting element, so that the light-emitting element emits light. Through the operation process, a current obtained by compensating variations in the threshold voltage of the first transistor can be supplied to the light-emitting element, thereby variations in luminance can be suppressed.
申请公布号 US9184186(B2) 申请公布日期 2015.11.10
申请号 US201514661574 申请日期 2015.03.18
申请人 Semiconductor Energy Laboratory Co., Ltd. 发明人 Shishido Hideaki
分类号 G06F3/038;H01L27/12;G09G3/32 主分类号 G06F3/038
代理机构 Husch Blackwell LLP 代理人 Husch Blackwell LLP
主权项 1. A semiconductor device comprising: a transistor; a first switch; a second switch; a third switch; a fourth switch; a semiconductor layer; an insulating film over the semiconductor layer; a conductive layer over the insulating film; an second insulating film over the conductive layer; a second conductive layer over the second insulating film; and a third conductive layer over the second insulating film, wherein a period in which the first switch is on and the second switch is off exists, wherein the transistor is a p-channel transistor; wherein each of the first switch, the second switch, the third switch, and the fourth switch is a p-channel transistor; wherein one of a source and a drain of the transistor is electrically connected to a first wire; wherein a gate of the transistor is electrically connected to the conductive layer, wherein a first terminal of the first switch is electrically connected to the gate of the transistor, wherein a second terminal of the first switch is electrically connected to the other of the source and the drain of the transistor, wherein a first terminal of the second switch is electrically connected to the other of the source and the drain of the transistor, wherein a second terminal of the second switch is electrically connected to a pixel electrode, wherein a first terminal of the third switch is electrically connected to a second wire, wherein a second terminal of the third switch is electrically connected to the semiconductor layer, wherein a first terminal of the fourth switch is electrically connected to a third wire, wherein a second terminal of the fourth switch is electrically connected to the semiconductor layer, wherein the conductive layer includes a region functioning as a gate electrode, wherein the second conductive layer is electrically connected to the conductive layer, wherein the third conductive layer is electrically connected to the semiconductor layer, wherein the first terminal of the first switch is electrically connected to the conductive layer through the second conductive layer, wherein the second terminal of the fourth switch is electrically connected to the semiconductor layer through the third conductive layer, wherein the first wire is capable of supplying a first potential which is input to one of the source and the drain of the transistor, wherein the second wire is capable of supplying a video signal, and wherein the third wire is capable of supplying a second potential which is input to the second conductive layer.
地址 JP