发明名称 Stacked microelectronic packages having sidewall conductors and methods for the fabrication thereof
摘要 Methods for fabricating stacked microelectronic packages are provided, as are embodiments of a stacked microelectronic package. In one embodiment, the method includes arranging a plurality of microelectronic device panels in a panel stack. Each microelectronic device panel contains plurality of microelectronic devices and a plurality of package edge conductors extending therefrom. Trenches are created in the panel stack exposing the plurality of package edge conductors, and a plurality of sidewall conductors is formed interconnecting different ones of the package edge conductors exposed through the trenches. The panel stack is then separated into a plurality of stacked microelectronic packages each including at least two microelectronic devices electrically interconnected by at least one of the plurality of sidewall conductors included within the stacked microelectronic package.
申请公布号 US9159702(B2) 申请公布日期 2015.10.13
申请号 US201213591924 申请日期 2012.08.22
申请人 FREESCALE SEMICONDUCTOR INC. 发明人 Gong Zhiwei (Tony);Vincent Michael B;Hayes Scott M;Wright Jason R
分类号 H01L21/00;H01L25/065;H01L23/00 主分类号 H01L21/00
代理机构 Ingrassia Fisher & Lorenz, P.C. 代理人 Ingrassia Fisher & Lorenz, P.C.
主权项 1. A method for fabricating stacked microelectronic packages, comprising: arranging a plurality of microelectronic device panels in a panel stack, each microelectronic device panel containing plurality of microelectronic devices and a plurality of package edge conductors extending therefrom; creating trenches in the panel stack exposing the plurality of package edge conductors; forming a plurality of sidewall conductors interconnecting different ones of the package edge conductors exposed through the trenches, forming comprising: depositing an electrically-conductive material into the trenches contacting the plurality of package edge conductors to produce conductor-filled trenches; andremoving selected portions of the electrically-conductive material to produce a series of linearly-spaced vertical openings in each conductor-filled trench, the series of linearly-spaced vertical openings partially defining the plurality of sidewall conductors; and separating the panel stack into a plurality of stacked microelectronic packages each comprising at least first and second sidewall conductors, the first sidewall conductor electrically isolated from the second sidewall conductor by one of the linearly-spaced vertical openings during removal of selected portions of the electrically-conductive material.
地址 Austin TX US