发明名称 Charge Trapping Split Gate Embedded Flash Memory and Associated Methods
摘要 Semiconductor devices and methods of manufacturing such devices are described herein. According to embodiments, the semiconductor device can be made by forming an dielectric layer at a first region and at a second region of a semiconductor substrate. A gate conductor layer is disposed over the dielectric formed in the first and the second regions of the semiconductor substrate, and the second region is masked. A split gate memory cell is formed in the first region of the semiconductor substrate with a first gate length. The first region is then masked, and the second region is etched to define a logic gate that has a second gate length. The first and second gate lengths can be different.
申请公布号 US2014167141(A1) 申请公布日期 2014.06.19
申请号 US201213715582 申请日期 2012.12.14
申请人 SPANSION LLC 发明人 RAMSBEY Mark;CHEN Chun;HADDAD Sameer;CHANG Kuo Tung;KIM Unsoon;FANG Shenqing;SUN Yu;GABRIEL Calvin
分类号 H01L29/792;H01L29/66 主分类号 H01L29/792
代理机构 代理人
主权项
地址 Sunnyvale CA US