发明名称 ERASE RAMP PULSE WIDTH CONTROL FOR NON-VOLATILE MEMORY
摘要 PURPOSE: An erase ramp pulse width control method for a nonvolatile memory is provided to reduce total erase operation time by decreasing erase threshold voltage distribution compression time. CONSTITUTION: A pulse width of erase pulses is set as an initial width. The erase pulses are repeatedly applied to a memory block until the memory block satisfies an erase metric or the maximum number of erase pulses are applied(517). A pulse voltage size of the erase pulses is gradually controlled from an initial pulse voltage level to the maximum pulse voltage level(519). When the pulse voltage size reaches a middle voltage level between the initial pulse voltage level and the maximum pulse voltage line, a width of the erase pulses becomes narrower than the initial width(525).
申请公布号 KR20120092027(A) 申请公布日期 2012.08.20
申请号 KR20120012270 申请日期 2012.02.07
申请人 FREESCALE SEMICONDUCTOR, INC. 发明人 CHOY JON S.;HE CHEN
分类号 G11C16/14;G11C16/34 主分类号 G11C16/14
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