发明名称 FAST FOURIER TRANSFORM CIRCUIT
摘要 <p>Disclosed is a fast Fourier transform circuit capable of high-speed reading and writing of data processed in the individual stages of a fast Fourier transform calculation without segmenting memory. The circuit is provided with: a calculation unit (1) which performs the fast Fourier calculations with digital Fourier transforms as structural elements; memory (2A, 2B) for storing the input/output data of the calculation unit (1); and a means (7) for controlling the writing of calculation results from the calculation unit (1) to the memory (2A, 2B) such that the order of reading data from the memory (2A, 2B) is the same at each stage in the multi-stage calculation performed on the data being processed by the calculation unit (11).</p>
申请公布号 WO2011102291(A1) 申请公布日期 2011.08.25
申请号 WO2011JP52844 申请日期 2011.02.10
申请人 NEC CORPORATION;NTT DOCOMO, INC.;HASHIMOTO, TAKESHI 发明人 HASHIMOTO, TAKESHI
分类号 G06F17/14 主分类号 G06F17/14
代理机构 代理人
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