发明名称 DATA ALIGNMENT CIRCUIT OF SEMICONDUCTOR MEMORY DEVICE AND METHOD THEREOF
摘要 PROBLEM TO BE SOLVED: To provide a data alignment circuit of a semiconductor memory device, which increases area efficiency and ease of design; and to provide a method thereof.SOLUTION: The data alignment circuit of the semiconductor memory device includes: a data strobe clock phase control part configured to control a phase of a data strobe clock according to a strobe delay code and generate a delayed strobe clock; a plurality of data phase control parts configured to control phases of input data according to respective data delay codes and generate respective delayed data; a plurality of data alignment parts configured to latch the respective delayed data according to the delayed strobe clock and generate respective latch data and alignment data; and a delay code generation part configured to perform an operation of determining a plurality of phases of the latch data and generate the strobe delay code and the plurality of the data delay codes.
申请公布号 JP2011008903(A) 申请公布日期 2011.01.13
申请号 JP20100046938 申请日期 2010.03.03
申请人 HYNIX SEMICONDUCTOR INC 发明人 JEONG CHUN SEOK;PARK KEE TEOK;YU SHOSHOKU;LEE JANG WOO;KIM HONG JUNG
分类号 G11C11/407;G11C11/4076 主分类号 G11C11/407
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