发明名称 WAFER LEVEL PACKAGE AND METHOD OF MANUFACTURING THE SAME
摘要 <p>PURPOSE: A wafer level package and a manufacturing method thereof are provided to improve the electrical connection reliability by uniformly forming the upper side of a main post and a core post in contact with a substrate. CONSTITUTION: A redistribution pattern including a post pad which is electrically connected to a chip pad is formed(S110). A passivation layer is formed on a semiconductor chip(S120). A sacrificial layer is formed on the passivation layer(S130). A core post is formed by stacking conductive materials on the post pad(S140). A main post is formed by charging the conductive material on a second window(S150). The sacrificial layer is removed(S160).</p>
申请公布号 KR20100082998(A) 申请公布日期 2010.07.21
申请号 KR20090002336 申请日期 2009.01.12
申请人 SAMSUNG ELECTRO-MECHANICS CO., LTD. 发明人 LEE, SEUNG SEOUP;JEON, HYUNG JIN
分类号 H01L21/60 主分类号 H01L21/60
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