发明名称 METHOD FOR FABRICATING SADDLE FIN TYPE OF TRANSISTOR
摘要 <p>A method for forming a transistor of a saddle fin structure is provided to improve electric characteristics of a semiconductor device by securing a stable cell driving current characteristic in a cell transistor of 40nm and less. An active area is defined on a substrate(100) by an isolation layer. A first ion implantation process is performed to form a channel. A recessed trench is formed by etching selectively the active area of the substrate. The isolation layer is etched to protrude the active area having the recessed trench in a constant thickness. A second ion implantation process is performed to implant second ions for controlling locally a threshold voltage into a sidewall of the protruded active area. A gate electrode is formed to cover the protruded active area.</p>
申请公布号 KR20090066943(A) 申请公布日期 2009.06.24
申请号 KR20070134688 申请日期 2007.12.20
申请人 HYNIX SEMICONDUCTOR INC. 发明人 LEE, JIN YUL
分类号 H01L21/336;H01L29/78 主分类号 H01L21/336
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