| 摘要 |
The invention relates to a floating gate non-volatile memory cell. The semiconductor material of the substrate and the materials of the floating and control gates are chosen in a predetermined way. In particular, the tunnelling current between the floating gate and the control gate is suppressed relative to the tunnelling current between the floating gate and the substrate, both during programming and erasing the cell, as a result of a predetermined choice of materials at the interfaces with the interposed dielectrics, more particularly such that the work functions at these interfaces meet predetermined requirements. In preferred embodiments, the floating gate comprises at least two layers.
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