发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND DATA PROCESSING SYSTEM
摘要 PROBLEM TO BE SOLVED: To contribute to improvement in a speed of data transmission for a server administration, without increasing a load of normal operation. SOLUTION: It has a central processing unit (31), an external memory interface circuit (32), a network interface circuit (33), an image process part (23), and a data compression section (24). The image process part performs image processing corresponding to input from an external bus. The image process part is connected to the external memory interface circuit by a dedicated internals bus (37). The image process part stores an image data in an external memory through the dedicated internals bus. A compression section is connected to the image process part, and can compress the image data supplied from the image process part. Since the image process part receives image information and the dedicated internals bus which stores it in the external memory is separated from a common internals bus, the data of the image processing by the image process part which responds an instruction from outside does not compete on the common internal bus with the data for the data processing by the instruction from the network interface circuit. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008176682(A) 申请公布日期 2008.07.31
申请号 JP20070011137 申请日期 2007.01.22
申请人 RENESAS TECHNOLOGY CORP 发明人 ONDA MICHIO
分类号 G06F11/30;G06F13/28;G06T1/20 主分类号 G06F11/30
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