发明名称 Method for forming misalignment inspection mark and method for manufacturing semiconductor device
摘要 A method for forming a misalignment inspection mark is disclosed. The formation method includes forming a reference layer device pattern and a first mark in a reference layer and forming an overlying layer device pattern and a second mark in a layer over the reference layer, the overlying layer device pattern corresponding to the reference layer. The second mark is formed by forming a second mark area adjacent to the first mark, the second mark area including an arrangement of a plurality of patterns having a line width, a pitch, and a pattern density at least one of which is equivalent to that of the overlying layer device pattern, and removing those of the plurality of patterns which are arranged at boundaries of the second mark area.
申请公布号 US2007026543(A1) 申请公布日期 2007.02.01
申请号 US20060491302 申请日期 2006.07.24
申请人 SATO TAKASHI 发明人 SATO TAKASHI
分类号 H01L21/00;G03F1/42;H01L21/027 主分类号 H01L21/00
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