发明名称 Method for making a dual damascene interconnect using a dual hard mask
摘要 An improved method of forming a semiconductor device is described. Initially, a structure is formed that includes first and second hard masking layers that cover a dielectric layer. A first part of the second hard masking layer and a first part of the first hard masking layer are etched to form an etched region within the hard mask that exposes a first portion of the dielectric layer. That etched region is filled with a sacrificial material. After etching through a second part of the second hard masking layer, the remainder of the sacrificial material is removed prior to subsequent processing.
申请公布号 US6872666(B2) 申请公布日期 2005.03.29
申请号 US20020289807 申请日期 2002.11.06
申请人 INTEL CORPORATION 发明人 MORROW PATRICK
分类号 H01L21/033;H01L21/311;H01L21/768;(IPC1-7):H01L21/311 主分类号 H01L21/033
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