发明名称 |
On-chip multiprocessor |
摘要 |
An on-chip multiprocessor having a chip layout for efficient multiprocessor control, wherein multiple processors and shared portions such as shared caches are symmetric with respect to a desired linear axis and a multiprocessor controller is located in the area containing said linear axis. This makes the distances between the processors and the controller equal and shorter, and also decreases differences in the distance between the controller and shared portions, thereby permitting higher speed processing of signals among these.
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申请公布号 |
US2004210738(A1) |
申请公布日期 |
2004.10.21 |
申请号 |
US20040832446 |
申请日期 |
2004.04.27 |
申请人 |
KATO TAKESHI;YAMAMOTO MICHITAKA;KAINO HIROMICHI;SHIMIZU TERUHISA;OHAYASHI MASAYUKI;YAMASHITA HIROKI;MASUDA NOBORU;SAITO TATSUYA |
发明人 |
KATO TAKESHI;YAMAMOTO MICHITAKA;KAINO HIROMICHI;SHIMIZU TERUHISA;OHAYASHI MASAYUKI;YAMASHITA HIROKI;MASUDA NOBORU;SAITO TATSUYA |
分类号 |
G06F15/16;G06F15/00;G06F15/80;(IPC1-7):G06F15/00 |
主分类号 |
G06F15/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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