发明名称 Semiconductor memory device having a power-on reset circuit
摘要 A semiconductor device includes an internal power supply terminal for supplying an internal power supply voltage, an oscillator generating a clock pulse when the internal power supply voltage becomes higher than a first voltage, a charge pump circuit charge pumping upon receiving the clock pulse, a reference voltage generator using the output voltage from the charge pump circuit as a power supply, and a voltage monitor which uses the output voltage from the charge pump circuit as a power supply, has a comparator for comparing a divided voltage of the internal power supply voltage with the reference voltage, and outputs a first signal of a first logic level as the power-on reset signal when the internal power supply voltage is higher than a second voltage. With this arrangement, a power-on reset circuit with little variation in power-on monitoring level can be provided.
申请公布号 US6642757(B2) 申请公布日期 2003.11.04
申请号 US20010957027 申请日期 2001.09.21
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 IKEHASHI TAMIO;KANDA KAZUSHIGE
分类号 G11C7/00;G11C5/14;H03K17/22;(IPC1-7):H03L7/00 主分类号 G11C7/00
代理机构 代理人
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