发明名称 A/D CONVERTER WITH HIGH-SPEED INPUT CIRCUIT
摘要 An A/D converter includes a first DC bias circuit and a second DC bias circuit with the same configuration and characteristic, the first and second DC bias circuits generate first and second common voltages with the same voltage level independently in response to a feedback control voltage supplied from an operational amplifier. The operational amplifier controls the first and second DC bias circuits in such a manner that the second common voltage fed from the second DC bias circuit via a second input buffer matches to the common voltage of the reference voltages of an AD core. This enables the first common voltage, which is generated by the first bias circuit and superimposed on to the analog input signal through the first input buffer, to be matched to the common voltage of the reference voltages of the A/D core.
申请公布号 US2003095061(A1) 申请公布日期 2003.05.22
申请号 US20020141115 申请日期 2002.05.09
申请人 TOKIOKA YOSHINORI 发明人 TOKIOKA YOSHINORI
分类号 H03K19/0175;H03M1/12;(IPC1-7):H03M1/12 主分类号 H03K19/0175
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