发明名称 METHOD FOR MANUFACTURING HIGH WITHSTAND VOLTAGE SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a method for manufacturing a high withstand voltage semiconductor device in which a gate electrode, a low concentration impurity layer and a high concentration impurity layer do not deviate at positions, in the method for manufacturing the semiconductor device for forming the low concentration impurity layer and the high concentration impurity layer. SOLUTION: The method for manufacturing the high withstand voltage semiconductor device comprises a step of forming a temporary gate 3a, a step of forming the low concentration impurity layer 4 by self-alignment with the gate 3a used as a mask, a step of forming a primary gate 6 after the gate 3a is removed, and a step of forming the high concentration impurity layer 8 by self-alignment with the gate 6 used as a mask.
申请公布号 JP2003133547(A) 申请公布日期 2003.05.09
申请号 JP20010330143 申请日期 2001.10.29
申请人 NEC KANSAI LTD 发明人 YAGI TAKASHI
分类号 H01L29/417;H01L21/336;H01L29/78;(IPC1-7):H01L29/78 主分类号 H01L29/417
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