发明名称 TRACE CONTROL CIRCUIT
摘要 PURPOSE: To solve a problem that the number of bits of a trace bus must be increased or the speed of a trace clock signal must be increased in order to trace the operation of a CPU on a real-time basis in the conventional microcomputer having a decoding circuit. CONSTITUTION: This trace control circuit is provided with a branch event generating circuit 1 having an address omission information generating circuit 8 detecting an overlapped portion from the upper address side between a branch origin address and a branch end address and a trace data omitting circuit 5 omitting part of trace data based on the address omission information and outputting the partially omitted trace data.
申请公布号 KR20020041276(A) 申请公布日期 2002.06.01
申请号 KR20010046917 申请日期 2001.08.03
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 DOI YOSHIFUMI;KANZAKI TERUAKI
分类号 G06F11/28;G06F11/22;G06F11/36;G06F15/78;(IPC1-7):G06F11/28 主分类号 G06F11/28
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