发明名称 IO- AND MEMORY BUS SYSTEM FOR DFPs AS UNITS WITH TWO- OR MULTI-DIMENSIONALLY PROGRAMMABLE CELL STRUCTURES
摘要 The system has several bundled individual lines or busses or partial busses inside a component with a two- or multi-dimensional programmable cell structure, enabling the component to be combined with others and/or connected to memories and/or peripherals. One or more interfaces are used to combine the lines and set up the bus system. The interfaces are controlled by one or more state machines.
申请公布号 EP0951682(A1) 申请公布日期 1999.10.27
申请号 EP19970953672 申请日期 1997.12.21
申请人 PACT INFORMATIONSTECHNOLOGIE GMBH 发明人 VORBACH, MARTIN;MUENCH, ROBERT
分类号 G06F13/16;G06F15/78;G06F15/82;G11C7/10 主分类号 G06F13/16
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