发明名称 |
Two step thermal treatment procedure applied to polycide structures deposited using dichlorosilane as a reactant |
摘要 |
A process for fabricating a polycide SAC structure, for a MOSFET device, has been developed. This process features a polycide SAC structure, comprised of tungsten silicide on in situ doped polysilicon, using tungsten hexafluoride and dichlorosilane as reactants for deposition of tungsten silicide. A first thermal anneal treatment is performed prior to polycide patterning, supplying protection to exposed tungsten silicide sides, during the patterning procedure. A second thermal anneal treatment is performed after polycide patterning, and prior to a silicon oxide deposition, offering protection to the exposed top surface of tungsten silicide, during the silicon oxide deposition.
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申请公布号 |
US5923988(A) |
申请公布日期 |
1999.07.13 |
申请号 |
US19980079526 |
申请日期 |
1998.05.15 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
CHENG, KUO-HSIEN;AN, CHI-DI;LIN, WEN JAN;LIAO, HUNG-CHE;SHEU, JER-YUAN |
分类号 |
H01L21/28;H01L21/60;(IPC1-7):H01L21/336 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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