SEMICONDUCTOR MEMORY DEVICE

摘要

PURPOSE: To achieve a semiconductor memory capable of keeping a sufficient precharge and an equalization time for transmitting data at a high speed. CONSTITUTION: Plural I/O line pair (I/O, the inverse of I/O) connected with corresponding bit line pair (BL, the inverse of BL) are divided into a first group of I/O line pairs transmitting data by a first group of selection signals CSL 0, 2,... and a second group of I/O line pairs transmitting data by a second group of selection signals CSL 1, 3,.... And, while one group of the I/O line pairs is transmitting data, the other group of the I/O line pairs is precharged and equalized. Thus, since data transmission can be performed concurrently with precharge, it is possible to keep a sufficient precharge time to speed up the data transmission.