| 摘要 |
A memory (50) having a BICMOS sense amplifier (20) includes a differential amplifier stage (11), emitter-follower input transistors (25 and 26), and emitter-follower output transistors (27 and 28). When sense amplifier (20) is deselected, P-channel transistors (31-37) pull the bases of the bipolar transistors (23-28) to VDD-2VBE and P-channel transistors (29 and 30) decouple the bases of emitter-follower output transistors (27 and 28) from the collectors of transistors (23 and 24). At the same time, N-channel transistors (38, 40, 42, 44, and 46) decouple N-channel transistors (39, 41, 43, 45, and 47) from the emitters of bipolar transistors (23-28). Thus, no current can flow, reducing the power consumption of sense amplifier (20). Also, bipolar transistors (23-28) are prevented from being excessively reverse-biased. Additionally, a plurality of sense amplifiers (20) can have their outputs wired-OR connected.
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