发明名称 Semiconductor input protective device against external surge voltage.
摘要 <p>A semiconductor input protective device has an NPN type bipolar transistor (Q) and an N-channel MOS transistor (M3). In the NPN type bipolar transistor, the collector is connected to a signal line (8) and the emitter and the base are commonly connected to a ground line (6). In the N-channel MOS transistor (M3), either the drain or the source is connected to the signal line (8) and the other of either the drain or the source is connected to the signal line (8) and the gate is connected to either the signal line or the power source line. The N-channel MOS transistor has a threshold voltage higher than the power source voltage. The NPN type bipolar transistor (Q) and the N-channel MOS transistor (M3) having a thick gate insulation film are used as input protection elements so that, even when a high voltage interface is effected, the function of the protective MOS transistor is not interfered with. &lt;IMAGE&gt;</p>
申请公布号 EP0538752(A1) 申请公布日期 1993.04.28
申请号 EP19920117752 申请日期 1992.10.16
申请人 NEC CORPORATION 发明人 MURAYAMA, MOTOAKI
分类号 H01L27/06;H01L27/02 主分类号 H01L27/06
代理机构 代理人
主权项
地址