Arrangement for testing sections of digital electronic systems - checks address of section against test address before connecting section scan bus to system scan bus

摘要

An arrangement for testing sections of digital electronic systems has limit sensing cells in the connections to the integrated circuits in the sections and controlled by a common control circuit. The cell inputs and outputs form a serial scan bus or scan path for the control circuit with at least one clock line and a control line. A further control circuit (STS) associated with a section controls its serial section scan bus (BAB) and forms the interface between the section scan bus and a higher level system scan bus (SAB). - The section busses are connected to the system bus depending on coincidence between an address defined by the actual position of the section (BG1....BGn) in the system and a test address for the section to be tested.