PARALLEL/SERIAL CONVERSION OUTPUT MECHANISM FOR LSI TESTER,申请号JP19880080258-传众专利搜索

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发明名称	PARALLEL/SERIAL CONVERSION OUTPUT MECHANISM FOR LSI TESTER
摘要
申请公布号	JPH01253667(A)	申请公布日期	1989.10.09
申请号	JP19880080258	申请日期	1988.04.02
申请人	HITACHI ELECTRON ENG CO LTD	发明人	MOCHIZUKI MASAAKI;WADA YUJI
分类号	G01R31/3183;G01R31/28	主分类号	G01R31/3183
代理机构		代理人
主权项
地址

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