发明名称 DIGITAL SIGNAL PROCESSING CIRCUIT
摘要 PURPOSE:To shorten an overall machine cycle and to improve the operation speed by separating the rounding processing and the overflow processing from an operating part and including them in a memory part. CONSTITUTION:A operation processing part consists of an addition cycle 1, and the overflow processing or the rounding processing is included in a memory cycle 2. For the purpose of operating a 29-bit adding part within 100nsec in an adding circuit having about 35nsec write time, the rounding processing and the overflow processing are separated from the adding part and are included in the cycle of the memory. Thus, the time of both the addition cycle and the memory cycle are equalized approximately to shorten the overall machine cycle, and the operation speed is improved.
申请公布号 JPS62164132(A) 申请公布日期 1987.07.20
申请号 JP19860006960 申请日期 1986.01.16
申请人 FUJITSU LTD 发明人 TANAKA ATSUMI;FUKUI HIROKAZU
分类号 G06F7/38 主分类号 G06F7/38
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