发明名称 TRANSMISSION INTERFACE ADAPTOR
摘要 PURPOSE:To send a data without hindrance from a low-order computer to a high-order computer by providing a microcomputer controlling the transmission of a data in a data memory according to a transmission protocol stored in a ROM in response to a detection signal of a detection means. CONSTITUTION:When a serial data is sent from the low-order computer to an input port 1, the data is converted into a parallel data at an input port 1 and written in either of data memories 6,7. Then the address of data memories 6,7 is designated sequentially by the count output of any of count terms 8, 9 corresponding thereto. When the sending of a data by one block is finished, the data of the next block is stored in other data memories 6,7. On the other hand, a detection signal of the detection means 2 is inputted to a microcomputer 10 as an interruption signal to control the transmission of the data according to the transmission protocol stored in a ROM11. When the transmission is finished, the count means 8,9 are cleared for the provision of the next procedure.
申请公布号 JPS61288539(A) 申请公布日期 1986.12.18
申请号 JP19850130629 申请日期 1985.06.14
申请人 SHIMADZU CORP 发明人 KANETO TAKAO
分类号 H04L29/06;H04L13/00 主分类号 H04L29/06
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