发明名称 LATCHING CIRCUIT OF ADDRESS INPUT SIGNAL
摘要 PURPOSE:To ensure an assured operation while a dynamic memory is precharged, by connecting a discharging and precharging MOSFETs to the source, and input and output sides of the n channel MOSFETs of a pair of inverters respectively. CONSTITUTION:The termial of the other side of an n channel MOSEFT4 is turned into an address signal latching input 35. This input 35 is connected to the drain of a precharging p channel MOSFET36. The input 35 is also turned into a gate input of p channel and n channel MOSFET39 and 41 respectively and at the same connected to the drains of p and n channel MOSFET38 and 40 respectively. These MOSFETs 38, 40 and 39, 41 form the inverter circuits respectively.
申请公布号 JPS5812194(A) 申请公布日期 1983.01.24
申请号 JP19810109279 申请日期 1981.07.15
申请人 OKI DENKI KOGYO KK 发明人 NAKAMURA TSUNEO;YOSHIDA TERUHIRO
分类号 G11C11/408;G11C8/06;G11C11/413 主分类号 G11C11/408
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