| 摘要 |
PURPOSE:To improve the execution efficiency and the reliability of a system, by performing automatic releases against intermittent troubles generated in an RAM. CONSTITUTION:When a parity error occurs in an RAM3 and a parity check circuit 7 detects it, the circuit 7 inputs an error signal to an interruption controlling circuit 2 and an interrupt signal A is outputted and an interruption operation is started. A microprocessor 1 starts a memory test routine plastored in an ROM5 based on the interrupt signal A, performs writing and reading of a fixed test information to the RAM3, and diagnoses whether the trouble of the RAM3 is a fixed one or an intermittent one. When the trouble is judged as an intermittent one by the diagnosis, the microprocessor starts a microprogram load routine stored into the ROM5, and rewrites the microprogram from an auxiliary memory into the RAM3 through a loader circuit 6. |
