发明名称 |
METHOD FOR FABRICATING HIGHLY CONDUCTIVE SILICON LINES |
摘要 |
A narrow silicon line which can be in the form of a gate pattern (30) is defined in a thin layer (16) of silicon on a semiconductor element (¦0) by applying a narrow ion beam (22) as provided by a focused-ion-beam source (24). The beam contains an ion which is a dopant in silicon. The layer (18) of silicon overlies a film (16) of oxide on a silicon or indium phosphide substrate (12). The ion beam can have a submicrometer dimension, can be translated to pattern a gate or interconnect line. The dopant ions are implanted into the polysilicon layer and thereby render the exposed portions of the layer preferentially insoluble to wet etchant. The non-exposed portions are preferentially removed to form a line or a gate (30). Standard FET processing may then be performed to provide source (32) and drain regions (34) as necessary to form a transistor device. |
申请公布号 |
WO8505493(A1) |
申请公布日期 |
1985.12.05 |
申请号 |
WO1984US01336 |
申请日期 |
1984.08.20 |
申请人 |
HUGHES AIRCRAFT COMPANY |
发明人 |
CHEN, JOHN, YUAN-TAI;RENSCH, DAVID, B. |
分类号 |
H01L21/28;H01L21/3213;H01L21/336;(IPC1-7):H01L21/28 |
主分类号 |
H01L21/28 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|