Forming dual contact silicide using metal multi-layer and ion beam mixing

摘要

A method for forming contact silicide for a semiconductor structure. In one embodiment, a dielectric layer is formed over a p-type region of a semiconductor structure comprising a gate stack and source and drain regions. The source and drain regions are formed within a semiconductor layer. First and second contact trenches are formed within the dielectric layer exposing at least a portion of the source region and a portion of the drain region, respectively. First and second metal layers are formed within the first and second contact trenches. The second metal layer includes a metallic material that is different from a metallic material of the first meal layer. The metallic materials of the first and second metal layers in a lower region of the first and second contact trenches are intermixed. A silicide is formed within the source and drain regions from the semiconductor layer and the intermixed metallic materials.

主权项

1. A method of forming contact silicide for a semiconductor structure, the method comprising:
forming a dielectric layer over a p-type region of a semiconductor structure comprising a gate stack and source and drain regions, the source and drain regions being formed within a semiconductor layer; forming a first contact trench and a second contact trench within the dielectric layer exposing at least a portion of the source region and a portion of the drain region, respectively; forming a first metal layer within the first and second contact trenches; forming a second metal layer in contact with the first metal layer, the second metal layer comprising a metallic material that is different from a metallic material of the first metal layer; intermixing the metallic materials of the first and second metal layers in a lower region of the first and second contact trenches, the intermixing forming an intermixed metallic material from the first and second metal layers; and forming a silicide within the source and drain regions from the semiconductor layer and the intermixed metallic material.