Structure and method to modulate threshold voltage for high-K metal gate field effect transistors (FETs)

摘要

A method for forming an electrical device that includes forming a high-k gate dielectric layer over a semiconductor substrate that is patterned to separate a first portion of the high-k gate dielectric layer that is present on a first conductivity device region from a second portion of the high-k gate dielectric layer that is present on a second conductivity device region. A connecting gate conductor is formed on the first portion and the second portion of the high-k gate dielectric layer. The connecting gate conductor extends from the first conductivity device region over the isolation region to the second conductivity device region. One of the first conductivity device region and the second conductivity device region may then be exposed to an oxygen containing atmosphere. Exposure with the oxygen containing atmosphere modifies a threshold voltage of the semiconductor device that is exposed.

主权项

1. A method of forming an electrical device comprising:
forming a first conductivity device region and a second conductivity device region in a semiconductor substrate, wherein the first conductivity device region is separated from the second conductivity device region by an isolation region; forming a high-k gate dielectric layer over the semiconductor substrate; forming a metal containing layer over the high-k gate dielectric layer; patterning the high-k gate dielectric layer and the metal containing layer to provide a space that separates a first portion of the high-k gate dielectric layer and a first portion of the metal containing layer that are present on the first conductivity device region from a second portion of the high-k gate dielectric layer and a second portion of the metal containing layer that are present on the second conductivity device region, the space exposing a portion of the isolation region; forming a connecting gate conductor on the first portion and the second portion of the metal containing layer and over the space, wherein the connecting gate conductor is a single continuous material layer that extends from the first conductivity device region across the space to the second conductivity device region; patterning the connecting gate conductor, the first portion and the second portion of the metal containing layer and the first portion and the second portion of the high-k gate dielectric to provide a gate structure extending from the first conductivity device region to the second conductivity device region; and exposing one of the first conductivity device region and the second conductivity device region to an oxygen containing atmosphere, while another one of the first conductivity device region and the second conductivity device region is not exposed to the oxygen containing atmosphere, wherein exposure to one of the first conductivity device region and the second conductivity device region with the oxygen containing atmosphere modifies a threshold voltage of a semiconductor device contained within one of the first conductivity device region and the second conductivity device region that is exposed to the oxygen containing atmosphere.