FOUR-STATE INPUT DETECTION CIRCUITRY

摘要

A circuit to detect states of a signal is provided. The circuit comprises an input node to receive an input signal. A state detection circuit detects a state of the input signal and generates a detection signal. The state corresponds to at least one of three states. Furthermore, the detection signal generated by the state detection circuit has a level based on the detected state of the input signal. A logic discriminator circuit generates first and second state signals based at least partly on the level of the detection signal. A clock detection circuit generates a clock signal based at least partly on a sequence of logic transitions of the first and second state signals.

主权项

1. A circuit to detect signal states, the circuit comprising:
an input node to receive an input signal; a state detection circuit to detect a state of the input signal and to generate a detection signal, the state corresponding to at least one of three states, the detection signal having a level based on the detected state of the input signal; a logic discriminator circuit to generate first and second state signals based at least partly on the level of the detection signal; and a clock detection circuit to generate a clock signal based at least partly on a sequence of logic transitions of the first and second state signals.