发明名称 |
Active area shaping of III-nitride devices utilizing multiple dielectric materials |
摘要 |
In an exemplary implementation, a III-nitride semiconductor device includes a III-nitride heterojunction including a first III-nitride body situated over a second III-nitride body to form a two-dimensional electron gas. The III-nitride semiconductor device further includes a dielectric body situated over the III-nitride heterojunction and including a first dielectric layer of a first dielectric material and a second dielectric layer of a second dielectric material different than the first dielectric material. A gate well of a first width is defined by the first dielectric layer, and is of a second width defined by the second dielectric layer, where the second width is greater than the first width. The III-nitride semiconductor device further includes a gate arrangement situated in the gate well and including a gate electrode integrated with a field plate. |
申请公布号 |
US8987784(B2) |
申请公布日期 |
2015.03.24 |
申请号 |
US201314081798 |
申请日期 |
2013.11.15 |
申请人 |
International Rectifier Corporation |
发明人 |
Briere Michael A. |
分类号 |
H01L29/66;H01L29/778;H01L21/28;H01L29/423;H01L29/20;H01L29/51;H01L23/31 |
主分类号 |
H01L29/66 |
代理机构 |
Farjami & Farjami LLP |
代理人 |
Farjami & Farjami LLP |
主权项 |
1. A III-nitride semiconductor device comprising:
a III-nitride heterojunction including a first III-nitride body situated over a second III-nitride body to form a two-dimensional electron gas; a dielectric body situated over said III-nitride heterojunction and comprising a first dielectric layer of a first dielectric material and a second dielectric layer of a second dielectric material different than said first dielectric material; first and second ohmic electrodes extending through said dielectric body to contact said III-nitride heterojunction; a gate dielectric situated between said III-nitride heterojunction and said dielectric body including said first dielectric layer and said second dielectric layer, said gate dielectric extending from said first ohmic electrode to said second ohmic electrode; a gate well being of a first width defined by said first dielectric layer, and being of a second width defined by said second dielectric layer, said second width being greater than said first width; a gate arrangement situated in said gate well and comprising a gate electrode integrated with a field plate. |
地址 |
El Segundo CA US |