发明名称 Hall element control circuit
摘要 A first terminal supplies the bias voltage to a high-potential-side input terminal of a hall element. A second terminal supplies the ground potential to a low-potential-side input terminal of the hall element. A P-channel type transistor is configured such that the source terminal is connected to the power supply potential and the drain terminal is connected to the first terminal. An operational amplifier differentially amplifies the voltage between a predetermined set voltage and the voltage at the first terminal so as to control the gate voltage of the P-channel type transistor.
申请公布号 US8773122(B2) 申请公布日期 2014.07.08
申请号 US201113153013 申请日期 2011.06.03
申请人 Semiconductor Components Industries, LLC 发明人 Kura Takeshi;Tsuda Hiroyuki;Kamiya Tomonori;Nagai Hiroki
分类号 G01R33/06 主分类号 G01R33/06
代理机构 代理人
主权项 1. A hall element control circuit, connected to a hall element via a wiring member, for controlling the hall element, the hall element control circuit comprising: a first terminal for supplying a bias voltage to a high-potential-side input terminal of the hall element; a second terminal final for supplying a ground potential to a low-potential-side input terminal of the hall element; a first transistor whose source terminal is connected to a power supply potential and whose drain terminal is connected to said first terminal; and an operational amplifier for controlling a gate voltage of said first transistor by differentially amplifying a voltage between a predetermined set voltage and a voltage at said first terminal; and a second transistor and a resistor connected in series with each other so as to constitute a current mirror circuit together with a first series circuit where said first transistor and the hall element are connected in series with each other, wherein said operational amplifier uses a connection point voltage between the second transistor and the resistor as a mirror voltage of high-potential-side input terminal voltage of the hall element.
地址 Phoenix AZ US